Production: Standard CMOS fabs and processes.
Design: Fits existing design infrastructure.
Compatibility: Radix conversion is easily done in hardware or software
Software: Pure ternary logic can be used, or conversion to binary allows full plug-in compatibility.
Our circuits have been simulated and analyzed by Omnibase, our research partners, independent researchers and third-party consultants.
Simulations of ternary SUS-LOC circuits have been done with full process margins and noise analysis.
A DSP chip has been designed and simulated vs. a TI DSP with results presented at ISPC by researchers at the University of California at Davis. The results showed:
• A 40% decrease in power consumption
• Reduced component count and die size, and
• Improved performance.
We have built circuits in binary, ternary, and tetranary and demonstrated their functionality.