In Development


We are continually working on the development of NEW IP.


We are actively seeking partners for the joint development of new IP.


Current developments are:


Tetranary SRAM


• Twice the storage capacity of a binary SRAM

• 50% less power needed (simulated results)

• Prototypes built and tested at ENSSAT.

 

Ternary general purpose DSP:


• Designed and modeled vs. a comparable binary chip

• The results were presented at ISPC and showed:

      - A 40% decrease in power consumption

      - Reduced component count

      - Reduced die size

      - And improved performance